Revision 1.21 – June 22, 2012
PPC440GX Embedded Processor
Signal Description
Data Sheet
The PPC440GX embedded controller is provided in a 552-ball, ball grid array package. The following tables
describe the package level pinout.
Table 5. Pin Summary
Group
Signal pins, non-multiplexed
Signal pins, multiplexed
Total Signal Pins
AxVDD
No. of Pins
343
63
406
3
AxGnd
OVDD
3
27
SVDD
VDD
9
34
70
Gnd
Total Power Pins
Reserved
146
0
Total Pins
552
In the table “Signal Functional Description” on page 49, each I/O signal is listed along with a short description of its
function. Active-low signals (for example, RAS) are marked with an overline. Please see “Signals Listed
Alphabetically” on page 18 for the pin (ball) number to which each signal is assigned.
Multiplexed Signals
Some signals are multiplexed on the same pin so that the pin can be used for different functions. In most cases,
the signal names shown in this table are not accompanied by signal names that may be multiplexed on the same
pin. If you need to know what, if any, signals are multiplexed with a particular signal, look up the name in “Signals
Listed Alphabetically” on page 18. It is expected that in any single application a particular pin will always be
programmed to serve the same function. The flexibility of multiplexing allows a single chip to offer a richer pin
selection than would otherwise be possible.
Multipurpose Signals
In addition to multiplexing, some pins are also multi-purpose. For example, the EBC peripheral controller address
pins (PerAddr00:31) are used as outputs by the PPC440GX to broadcast an address to external slave devices
when the PPC440GX has control of the external bus. When during the course of normal chip operation an external
master gains ownership of the external bus, these same pins are used as inputs which are driven by the external
master and received by the EBC in the PPC440GX. In this example, the pins are also bidirectional, serving both as
inputs and outputs.
Multimode Signals
In some cases (for example, Ethernet) the function of a pin may vary with different modes of operation. When a pin
has multiple signal names assigned to distinguish different modes of operation, all of the names are shown.
Strapping Pins
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs only
during reset and are used for other functions during normal operation (see “Strapping” on page 88). Note that
these are not multiplexed pins since the function of the pins is not programmable.
48
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