Revision 1.15 – August 30, 2007
440GX – Power PC 440GX Embedded Processor
Data Sheet
I/O Specifications—All Speeds (Sheet 3 of 7)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for 133MHz and
1.7ns for 66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66MHz. PCI output hold time
requirement is 1ns for 66MHz and 2ns for 33MHz.
3. The clock frequency for RMII operation is 50MHz ± 100ppm.
4. The clock frequency for SMII operation is 125MHz ± 100ppm.
5. These are DDR signals that can change on both the positive and negative clock transitions.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time
(TIS min)
Hold Time
(TIH min)
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
Ethernet SMII Interface
EMC0:1RxD
0.8
0.8
na
0.8
0.8
na
na
na
na
na
2
5.1
5.1
5.1
5.1
6.8
6.8
6.8
6.8
EMCRefClk
EMCRefClk
EMCRefClk
EMCRefClk
EMC2:3RxD
EMC0:1TxD
3.5
3.5
EMC2:3TxD
na
na
2
4,
async
EMCRefClk
na
na
na
na
na
na
Ethernet GMII Interface
GMCRxClk
1,
async
na
na
na
na
na
na
GMCRxD0:7
GMCRxEr
2
2
2
0
0
0
na
na
na
na
na
na
5.1
5.1
5.1
6.8
6.8
6.8
GMCRxClk
GMCRxClk
GMCRxClk
GMCRxDV
1,
async
GMCCrS
GMCol
na
na
na
na
na
na
5.1
5.1
na
6.8
6.8
na
1,
async
1,
async
GMCGTxClk
na
na
GMCTxD0:7
GMCTxEr
na
na
na
na
na
na
5.5
5.5
5.5
0.5
0.5
0.5
5.1
5.1
5.1
6.8
6.8
6.8
GMCGTxClk
GMCGTxClk
GMCGTxClk
GMCTxEn
72
AMCC
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
