440GX – Power PC 440GX Embedded Processor
Revision 1.15 – August 30, 2007
Data Sheet
System Memory Address Map
Function
Reserved
PCI-X I/O
Reserved
PCI-X External Configuration Registers
PCI-X
Reserved
PCI-X Bridge Core Configuration Registers
Reserved
PCI-X Special Cycle
PCI-X Memory
Notes:
1. DDR SDRAM and
on-chip
SRAM can be located anywhere in the Local Memory area of the memory map.
2. The Boot ROM and Expansion ROM areas of the memory map are intended for use by ROM or Flash-type devices. While locating
volatile DDR SDRAM and SRAM in this region is supported, use of these regions for this purpose is not recommended.
3. When the optional boot from PCI-X memory is selected, the PCI-X Boot ROM address space begins at 2 FFFE 0000 (128 KB).
(Sheet 2 of 2)
Sub Function
Start Address
2 0000 0000
2 0800 0000
2 0C00 0000
2 0EC0 0000
2 0EC0 0008
2 0EC8 0000
2 0EC8 0100
2 0ED0 0000
2 0EE0 0000
End Address
2 07FF FFFF
2 0BFF FFFF
2 0EBF FFFF
2 0EC0 0007
2 0EC7 FFFF
2 0EC8 00FF
2 0EC8 00FF
2 0EDF FFFF
F FFFF FFFF
1MB
55.76 GB
256B
8B
64MB
Size
8
AMCC