Revision 1.19 – May 07, 2008
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Date
Version
Contents of Modification
Change analog voltage filter circuit inductor part number.
Change all multiplexed GPIO signal defaults to the GPIO signals.
Change AC12 default from IRQ5 to DMAReq1.
Correct descriptions of LeakTest, RcvrInh, ModeCtrl, RefEn, and DrvrInh1:2 signals.
Added Assembly Requirements section on page 17, added Unused I/Os section on page 50, placed
the analog filter diagram in its own section.
Added changes to the Internal Buses, changes to Assembly Requirements, moved diagram from
under Device Characteristics to Power Sequencing and added more information, added information
to DDR SDRAM Read Data Path Diagram, added information to Test Condition and I/O
Specifications diagrams.
12/03/2007
1.17
Changed the technical support telephone and fax number.
Changed temperature rating for 333MHz and 400MHz parts on page 4 as per Product Change
Notification: 091207-01.
Added note for EMCSync signal to I/O Specification table.
Added timing references to I/O Specification tables.
Corrected setup and hold timing for RejectPK in I/O Specification table.
Added definition for RDSP abbreviation to DDR SDRAM Read Data Path figure.
Added notes 3 and 4 to Recommended DC Operating Conditions table.
Added Overshoot/Undershoot specification.
Replaced 16750 compatible UART to 16550
Replaced NS16750 with NS16550.
03/18/2008
05/07/2008
1.18
1.19
Deleted incorrect MDIO timing data from table 20.
AMCC Proprietary
87