Revision 1.16 – July 19, 2006
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
In the following table, only the primary (default) signal name is shown for each pin. Multiplexed or multifunction
signals are marked with an asterisk (*). To determine what signals or functions are multiplexed on those pins, look
up the primary signal name in Table 3, Signals Listed Alphabetically.
Table 4. Signals Listed by Ball Assignment (Sheet 1 of 7)
Ball
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
Signal Name
Ball
B01
B02
B03
B04
B05
B06
B07
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
Signal Name
Ball
C01
C02
C03
C04
C05
C06
C07
C08
C09
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
Signal Name
PerData12
Ball
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
Signal Name
PerData10
GND
GND
PerData15
GND
PerClk
TMS
TestEn
PerOE
GND
IRQ0*
PerCS2*
PerAddr05*
GND
PerAddr02*
TCK
PerWBE1
PerReady
PerCS1*
PerAddr03*
PerAddr07*
PerAddr10
PerAddr15
PerAddr16
PerAddr18
PerAddr26
PerAddr30
PCIAD01
PCIAD06
TDI
GND
PerR/W
PerCS0*
TRST
PerAddr06*
PerCS3*
PerAddr11
PerAddr14
PerCS4*
PerAddr19
PerAddr20
PerAddr25
PerAddr27
PerAddr29
PCIAD00
PCIAD04
PCIC0/BE0
PCIReq2
PCIReq1
PCIClk
PerAddr09
PerAddr13
GND
PerAddr04*
PerAddr08
PerAddr12
PerBLast
PerAddr17
PerAddr21
PerAddr31
PCIAD02
PCIAD07
PCIGnt0/Req
IRQ8*
PerCS5*
GND
PerAddr23
PerAddr22
PerAddr24
PerAddr28
GND
PCIAD03
PCIAD05
IRQ9*
PCIAD08
PCIReq3
PCIAD10
TDO
PCIReset
PCIINT
PCIAD09
GND
GND
PCIReq4
PCIAD12
PCIAD13
PCIGnt2
GND
PCIAD11
ExtReset
IRQ7*
PCIAD14
PCIPar
PCIAD15
GND
GND
PCIPErr
PCIGnt3
PCIDevSel
GND
Halt*
GND
PSROOut
AMCC Proprietary
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