Revision 1.31 – February 16, 2012
440EPx – PPC440EPx Embedded Processor
Data Sheet
Table 20. I/O Specifications—PCI, USB, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 2 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. SMIISync is a weak driver. Redrive SMIISync when driving more than one load.
3. TDO timing is referenced to the falling edge of TCK.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
(TIS min)
(TIH min)
Ethernet SMII Interface
SMIISync
3
1
5.1
5.1
5.1
5.1
5.1
6.8
6.8
6.8
6.8
6.8
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
2
SMII0RxD
1.5
1.5
1
1
SMII1RxD
SMII0TxD
3
3
1
1
SMII1TxD
Internal Peripheral Interface
IIC0SClk
n/a
n/a
12.8
12.8
12.8
12.8
12.8
12.8
10.2
n/a
IIC0SData
IIC1SClk
5
5
0
0
IIC0SClk
IIC1SClk
n/a
IIC1SData
SCPClkOut
SCPDI
n/a
n/a
5
1.5
n/a
SCPClkOut
SCPClkOut
SCPDO
6
0
n/a
UARTn_Rx
UARTn_Tx
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RI
UARTn_RTS
USB2Xcvr
USB2Xcvr
USB2DI0:7
USB2DO0:7
USB2LS0:1
USB2OM0:1
USB2RxAct
USB2RxDV
USB2RxErr
USB2Susp
USB2TermSel
USB2TxRdy
USB2TxVal
USB2XcvrSel
Interrupts Interface
IRQ0:9
n/a
async
async
async
async
async
async
async
async
19.1
n/a
8.7
n/a
n/a
n/a
n/a
n/a
19.1
n/a
8.7
n/a
19.1
USB 2.0
USB 2.0
14.6
14.6
n/a
8.7
USB 2.0
USB 2.0
6.6
4
4
4
0
0
0
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
4
4
1
1
6.6
n/a
19.1
n/a
8.7
n/a
4
4
4
4
1
1
1
1
n/a
n/a
19.1
19.1
19.1
n/a
8.7
8.7
8.7
4
0
n/a
4
4
1
1
19.1
19.1
8.7
8.7
n/a
n/a
JTAG Interface
TCK
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
40MHz
TCK
Max
3
TDI
2
2
5.5
5.5
TDO
9.5
1
TCK
TMS
TCK
TRST
async
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