440EPx – PPC440EPx Embedded Processor
Revision 1.31 – February 16, 2012
Data Sheet
Table 2. DCR Address Map (Sheet 1 of 2)
Function
Total DCR Address Space
1
By function:
Reserved
Clocking Power On Reset (CPR0)
System DCRs (SDR0)
Memory Controller (SDRAM0)
External Bus Controller (EBC0)
Reserved
PLB4-to-PLB3 Bridge
PLB3-to-PLB4 Bridge
Reserved
PLB3 Arbiter
PLB4 Arbiter
PLB3-to-OPB0 Bridge
Reserved
Power Management
Reserved
Interrupt Controller 0
Interrupt Controller 1
Interrupt Controller 2
Power Management 1
Reserved
DMA-to-PLB3 Controller
Reserved
Ethernet MAL
PLB4-to-OPB1 Bridge
Reserved
DMA-to-PLB4 Controller
PLB4-to-OPB2 Bridge
OPB2-to-PLB4 Bridge
Reserved
USB 2.0 Host OPB Master DCR
Reserved
USB 2.0 Host OPB Slave DCR
Reserved
000
00C
00E
010
012
014
020
030
040
070
080
090
0A0
0B0
0B8
0C0
0D0
0E0
0F0
0F8
100
140
180
200
210
300
340
350
358
360
368
370
374
00B
00D
00F
011
013
01F
02F
03F
06F
07F
08F
09F
0AF
0B7
0BF
0CF
0DF
0EF
0F7
0FF
13F
17F
1FF
20F
2FF
33F
34F
357
35F
367
36F
373
37F
12W
2W
2W
2W
2W
12W
16W
16W
48W
16W
16W
16W
16W
8W
8W
16W
16W
16W
8W
8W
64W
64W
128W
16W
240W
64W
16W
8W
8W
8W
8W
4W
12W
Start Address
000
End Address
3FF
Size
1KW (4KB)
1
8
AppliedMicro Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
