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PPC440EPX-STA667TZ 参数 Datasheet PDF下载

PPC440EPX-STA667TZ图片预览
型号: PPC440EPX-STA667TZ
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 677MHz, CMOS, PBGA680, 35 MM, THERMALLY ENHANCED, PLASTIC, BGA-680]
分类和应用: 时钟外围集成电路
文件页数/大小: 94 页 / 3186 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.26 – October 15, 2007  
440EPx – PPC440EPx Embedded Processor  
Preliminary Data Sheet  
Table 10. Recommended DC Operating Conditions (Sheet 2 of 2)  
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended  
conditions can affect device reliability.  
Parameter  
Input Logic High 3.3V PCI  
Symbol  
Minimum  
Typical  
Maximum  
Unit  
V
Notes  
0.5OVDD  
OVDD+0.5  
1
Input Logic High 3.3V LVTTL  
+2.0  
+1.7  
+3.6  
+3.6  
V
VIH  
Input Logic High 2.5V CMOS, 3.3V tolerant  
V
SVREF  
0.125 (0.15)  
+
Input Logic High 1.8V DDR2 (2.5V DDR1)  
2.2 (3.0)  
V
0.35OVDD  
Input Logic Low 3.3V PCI  
Input Logic Low 3.3V LVTTL  
Input Logic Low 2.5V CMOS  
0.5  
0
V
V
V
1
+0.8  
+0.7  
VIL  
0
SVREF  
0.125 (0.15)  
Input Logic Low 1.8V DDR2 (2.5V DDR1)  
-0.3 (-0.3)  
0.9OVDD  
V
Output Logic High 3.3V PCI  
-
V
V
V
V
V
V
V
V
1
Output Logic High 3.3V LVTTL  
+2.4  
+3.6  
VOH  
Output Logic High 2.5V CMOS  
+2.0  
+2.7  
Output Logic High 1.8V DDR2 (2.5V DDR1)  
Output Logic Low 3.3V PCI  
+0.95 (+1.7)  
+1.95 (+2.7)  
0.1OVDD  
5
1
-
Output Logic Low 3.3V LVTTL  
0
0
0
0
+0.4  
VOL  
Output Logic Low 2.5V CMOS  
+0.4  
+0.43 (+0.54)  
0
Output Logic Low 1.8V DDR2 (2.5V DDR1)  
Input Leakage Current (no pull-up or pull-down)  
5
IIL1  
IIL2  
μA  
μA  
μA  
V
Input Leakage Current for pull-down  
Input Leakage Current for pull-up  
0 (LPDL)  
200 (MPUL)  
0 (MPUL)  
+3.9  
IIL3  
150 (LPDL)  
VIMAO  
VIMAU  
VOMAO  
VOMAU3  
TC  
Input Max Allowable Overshoot 3.3V LVTTL  
Input Max Allowable Undershoot 3.3V LVTTL  
Output Max Allowable Overshoot 3.3V LVTTL  
Output Max Allowable Undershoot 3.3V LVTTL  
Case Temperature  
0.6  
V
+3.9  
V
0.6  
40  
V
+100  
°C  
6
Notes:  
1. PCI drivers meet PCI specifications.  
2. SVREF = SOVDD/2. SOVDD = +1.8V for DDR2 memory or +2.5V for DDR1 memory.  
3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the  
PPC440EPx. See “Absolute Maximum Ratings” on page 66.  
4. Startup sequencing of the power supply voltages is not required. A power-down cycle must complete (OV  
and V  
are below  
DD  
DD  
+0.4V) before a new power-up cycle is started  
5. At IOH = IOL= 10ma.  
6. Case temperature, TC, is measured at top center of case surface with device soldered to a circuit board.  
AMCC Proprietary  
67