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PPC405EP-3LB333CZ 参数 Datasheet PDF下载

PPC405EP-3LB333CZ图片预览
型号: PPC405EP-3LB333CZ
PDF下载: 下载PDF文件 查看货源
内容描述: 405EP的PowerPC嵌入式处理器 [PowerPC 405EP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 50 页 / 805 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.07 – September 10, 2007  
PPC405EP – PowerPC 405EP Embedded Processor  
Data Sheet  
Table 11. DC Electrical Characteristics  
Parameter  
Symbol  
Minimum  
Typical  
300  
325  
45  
Maximum  
610  
Unit  
mA  
mA  
mA  
mA  
W
Active Operating Current (VDD)–266MHz  
IDD  
Active Operating Current (VDD)–333MHz  
IDD  
IODD  
IPLL  
PDD  
PDD  
690  
Active Operating Current (OVDD  
)
200  
PLL VDD Input current  
16  
23  
Active Operating Power–266MHz  
Active Operating Power–333MHz  
Note:  
0.72  
0.76  
1.92  
2.07  
W
1. The maximum current and power values listed above are not guaranteed to be the highest obtainable. These values are  
dependent on many factors including the type of applications running, clock rates, use of internal functional capabilities, external  
interface usage, case temperature, and the power supply voltages. Your specific application can produce significantly different  
results. VDD (logic) current and power are primarily dependent on the applications running and the use of internal chip functions  
(DMA, PCI, Ethernet, and so on). OVDD (I/O) current and power are primarily dependent on the capacitive loading, frequency, and  
utilization of the external buses. The following information provides details about the conditions under which the values in the table  
above could be obtained:  
a. In general, there would be four PCI devices, an external bus master on the peripheral bus, and external wrap-back on the  
Ethernet port. For IODD measurements, PLB = 133.3MHz, OPB = PerClk = 66.6MHz, and PCI = SysClk = 33.3MHz.  
b. Typical current and power are characterized at VDD = +1.8V, OVDD = +3.3V, and TC = +36°C while running various  
applications under the Linux operating system.  
c. Maximum current and power are characterized at VDD = +1.9V, OVDD = +3.6V, and TC = +85°C while running applications  
designed to maximize CPU power consumption. An external PCI master heavily loads the PCI bus with transfers targeting  
SDRAM while the internal DMA controller further increases SDRAM bus traffic.  
2. AVDD should be derived from VDD using the following circuit:  
L1 – 2.2μH SMT inductor (equivalent to MuRata  
AVDD  
VDD  
LQH3C2R2M34) or SMT chip ferrite bead (equivalent  
to MuRata BLM31A700S)  
L1  
+
C1 – 3.3 μF SMT tantalum  
C1  
C2  
C3  
C2 – 0.1μF SMT monolithic ceramic capacitor with X7R  
AGND  
dielectric or equivalent  
C3 – 0.01μF SMT monolithic ceramic capacitor with X7R  
GND  
dielectric or equivalent  
AMCC  
39  
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