Revision 1.02 – January 11, 2005
PPC405CR – PowerPC 405CR Embedded Processor
Data Sheet
Table 4. Signals Listed by Ball Assignment (Sheet 1 of 3)
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
DrvrInh2
Ball
Signal Name
VDD
VDD
A1
GND
TDI
B10
PerCS4[GPIO13]
C19
E8
A2
A3
A4
A5
B11
B12
B13
B14
PerAddr16
PerAddr18
PerAddr21
PerAddr24
C20
D1
IRQ1[GPIO18]
PerWBE3
PerWBE0
PerClk
E9
PerAddr0
E10
E11
E12
GND
GND
VDD
PerAddr1
D2
PerCS3[GPIO12]
D3
VDD
A6
A7
Gnd
B15
B16
DMAReq2
DMAAck2
D4
D5
GND
TDO
E13
E14
OVDD
OVDD
GND
PerAddr9
A8
DMAReq3
PerAddr15
GND
B17
B18
B19
B20
C1
DMAAck1
GPIO1[TS1E]
GND
D6
D7
PerCS0
E15
E16
E17
E18
E19
E20
F1
A9
PerAddr3
A10
A11
A12
A13
A14
A15
A16
A17
A18
D8
PerAddr6
Rcrvinh
IRQ2[GPIO19]
Halt
PerAddr17
PerCS6[GPIO15]
PerAddr20
DMAAck3
GND
TmrClk
D9
PerAddr10
PerAddr13
PerAddr19
PerAddr23
PerAdd26
PerAddr29
PerAddr31
GPIO2[TS2E]
PerR/W
D10
D11
D12
D13
D14
D15
D16
AVDD
C2
PerPar0
C3
GND
GND
C4
PerWE
F2
EOT1/TC1
PerWBE2
PerWBE1
OVDD
PerAddr27
PerAddr30
SysErr
C5
PerCS2[GPIO11]
PerAddr4
PerAddr7
F3
C6
F4
C7
F5
OVDD
A19
A20
B1
B2
B3
B4
B5
B6
B7
B8
DMAReq0
GND
C8
PerAddr11
D17
D18
D19
D20
E1
GND
F16
F17
F18
F19
F20
G1
C9
PerAddr14
IRQ0[GPIO17]
SysReset
IRQ3[GPIO20]
PerPar2
PerBLast
PerReady
PerOE
DrvrInh1
IRQ5[GPIO22]
TestEn
PerErr
C10
C11
C12
C13
C14
C15
C16
C17
PerCS5[GPIO14]
PerCS7[GPIO16]
PerAddr22
GND
TMS
GND
TCK
PerAddr25
E2
PerData29
PerData30
PerPar1
EOT0/TC0
OVDD
PerCS1[GPIO10]
PerAddr2
PerAddr5
PerAddr8
PerAddr28
E3
G2
DMAReq1
E4
G3
DMAAck0
E5
GND
G4
OVDD
GPIO3[TS1O]
E6
G5
OVDD
OVDD
B9
PerAddr12
C18
GND
E7
G16
18
AMCC
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
