Revision 1.02 – January 11, 2005
PPC405CR – PowerPC 405CR Embedded Processor
Data Sheet
Table 3. Signals Listed Alphabetically (Sheet 3 of 7)
Signal Name
Ball
Interface Group
Page
GPIO1[TS1E]
B18
D16
C17
P18
T17
W18
Y19
W13
V6
GPIO2[TS2E]
GPIO3[TS1O]
GPIO4[TS2O]
GPIO5[TS3]
GPIO6[TS4]
GPIO7[TS5]
GPIO8[TS6]
GPIO9[TrcClk]
System
26
Halt
E19
System
26
25
HoldAck
HoldPri
T4
T3
V2
External Master Peripheral
HoldReq
IICSCL
IICSDA
U15
Internal Peripheral
Internal Peripheral
25
25
W17
IRQ0[GPIO17]
IRQ1[GPIO18]
IRQ2[GPIO19]
IRQ3[GPIO20]
IRQ4[GPIO21]
IRQ5[GPIO22]
IRQ6[GPIO23]
D18
C20
E18
D20
G17
F18
W20
Interrupts
26
MemAddr0
MemAddr1
MemAddr2
MemAddr3
MemAddr4
MemAddr5
MemAddr6
MemAddr7
MemAddr8
MemAddr9
MemAddr10
MemAddr11
MemAddr12
Y7
W7
V8
U7
Y4
U6
W4
V5
W3
V4
U3
V1
T2
SDRAM
23
Note: During a CAS cycle MemAddr0 is the least significant bit (lsb) on this
bus.
MemClkOut0
MemClkOut1
H20
G18
SDRAM
23
AMCC
13
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
