Revision 1.02 – January 11, 2005
PPC405CR – PowerPC 405CR Embedded Processor
Data Sheet
Table 3. Signals Listed Alphabetically (Sheet 6 of 7)
Signal Name
Ball
Interface Group
Page
PerData0
PerData1
PerData2
PerData3
PerData4
PerData5
PerData6
PerData7
PerData8
PerData9
PerData10
PerData11
PerData12
PerData13
PerData14
PerData15
PerData16
PerData17
PerData18
PerData19
PerData20
PerData21
PerData22
PerData23
PerData24
PerData25
PerData26
PerData27
PerData28
PerData29
PerData30
PerData31
U2
R4
U1
R2
R3
T1
N4
P3
N2
P1
M4
N3
M2
N1
L4
M3
L2
External Slave Peripheral
23
Note: PerData0 is the most significant bit (msb) on this bus.
M1
K2
L3
K1
J1
J2
K3
K4
H1
H2
J3
J4
G1
G2
H3
PerErr
PerOE
B1
E4
External Master Peripheral
External Slave Peripheral
25
23
PerPar0
PerPar1
PerPar2
PerPar3
C2
G3
E1
H4
External Slave Peripheral
23
PerReady
PerR/W
E3
C1
External Slave Peripheral
External Slave Peripheral
23
23
PerWBE0
PerWBE1
PerWBE2
PerWBE3
D2
F4
F3
D1
External Slave Peripheral
23
PerWE
RAS
C4
External Slave Peripheral
SDRAM
23
23
26
K18
E17
RcvrInh
System
J20
G19
R17
T20
V16
Other pins
Notes:
Reserved
27
1. Connect G19 to ground.
2. Other reserved pins are not connected internally within the chip and
should not have signals, voltage, or ground applied to them.
16
AMCC