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PPC405GP-3EE266CZ 参数 Datasheet PDF下载

PPC405GP-3EE266CZ图片预览
型号: PPC405GP-3EE266CZ
PDF下载: 下载PDF文件 查看货源
内容描述: 的Power PC 405GP嵌入式处理器 [Power PC 405GP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 59 页 / 1340 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 2.03 – September 7, 2007  
405GP – Power PC 405GP Embedded Processor  
Data Sheet  
DC Electrical Characteristics  
Parameter  
Symbol  
Typical  
TBD  
550  
730  
TBD  
35  
Maximum  
TBD  
670  
Unit  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
W
Active Operating Current (VDD)–133MHz  
IDD  
Active Operating Current (VDD)–200MHz  
Active Operating Current (VDD)–266MHz  
Active Operating Current (OVDD)–133MHz  
Active Operating Current (OVDD)–200MHz  
Active Operating Current (OVDD)–266MHz  
PLL VDD Input current  
IDD  
IDD  
880  
IODD  
IODD  
IODD  
IPLL  
PDD  
PDD  
PDD  
TBD  
37  
37  
40  
16  
23  
Active Operating Power–133MHz  
Active Operating Power–200MHz  
Active Operating Power–266MHz  
Note:  
TBD  
1.5  
TBD  
2.01  
2.61  
W
2.0  
W
1. Maximum power is characterized at VDD = +2.7V, OVDD = +3.6V, TC = +85°C, across the silicon process (worse case to best case),  
while running an application designed to maximize power consumption. The specifications at 200MHz correspond to CPU = 200 MHz,  
PLB = 100MHz, OPB = EBC = 50MHz, PCI = 33.3MHz. The specifications at 266MHz correspond to CPU = 266.6MHz, PLB  
=133.3MHz, OPB = EBC = 66.6MHz, and PCI = 33.3MHz.  
2. AVDD should be derived from VDD using the following circuit:  
L1 – 2.2μH SMT inductor (equivalent to MuRata  
LQH3C2R2M34) or SMT chip ferrite bead (equivalent  
to MuRata BLM31A700S)  
AVDD  
VDD  
L1  
+
C1 – 3.3 μF SMT tantalum  
C1  
C2  
C3  
C2 – 0.1μF SMT monolithic ceramic capacitor with X7R  
AGND  
dielectric or equivalent  
C3 – 0.01μF SMT monolithic ceramic capacitor with X7R  
GND  
dielectric or equivalent  
Test Conditions  
Clock timing and switching characteristics are specified in accordance with  
operating conditions shown in the table “Recommended DC Operating  
Conditions.” For all signals other than PCI signals, AC specifications are  
Output  
Pin  
50pF  
10pF  
All signals other  
than PCI  
characterized at OV = +3V and T = +85°C with the 50pF test load  
DD  
C
shown in the figure at right.  
For PCI signals there are two different test load circuits, one for the rising  
edge and one the falling edge as shown in the figures at right.  
Output  
Pin  
25Ω  
PCI Rising edge  
Output  
Pin  
OVDD  
25Ω  
PCI Falling edge  
10pF  
46  
AMCC