Revision 2.00 – December 2, 2004
405GPr – Power PC 405GPr Embedded Processor
Data Sheet
Signals Listed Alphabetically (Sheet 8 of 9)
Signal Name
Ball
U24
E25
Interface Group
Page
31
PHYRxErr
PHYTxClk
RAS
Ethernet
Ethernet
31
AF24 SDRAM
C25
E23
E24
Y23
Y26
32
Other
Reserved
37
Note: AF4 must be tied to OVDD or GND. All other reserved pins should be left
unconnected.
AF41
U23
A25
Req[PCIGnt0]
SysClk
SysErr
SysReset
TCK
PCI
30
35
35
35
35
35
35
35
35
35
35
System
AD25 System
D22 System
AD22 JTAG
AE24 JTAG
AD23 JTAG
TDI
TDO
TestEn
TmrClk
TMS
D26
D24
System
System
AC22 JTAG
AE26 JTAG
TRST
[TS1E]GPIO1
[TS2E]GPIO2
[TS1O]GPIO3
[TS2O]GPIO4
[TS3]GPIO5
[TS4]GPIO6
[TS5]GPIO7
[TS6]GPIO8
[TrcClk]GPIO9
D18
C20
A22
AF18
AC9
AE8
AF5
AC7
AB3
System
35
UART0_CTS
AB4
Internal Peripheral
34
34
34
34
34
34
34
34
34
34
34
34
34
34
34
UART0_DCD
AE18 Internal Peripheral
UART0_DSR
AE3
AF2
Internal Peripheral
Internal Peripheral
UART0_DTR
UART0_RI
AD15 Internal Peripheral
AD16 Internal Peripheral
AE16 Internal Peripheral
UART0_RTS
UART0_Rx
UART0_Tx
AF3
AC3
AC3
AD2
AD2
AC1
AC2
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
UART1_CTS/UART1_DSR
UART1_DSR/UART1_CTS
UART1_DTR/UART1_RTS
UART1_RTS/UART1_DTR
UART1_Rx
UART1_Tx
UARTSerClk
AE17 Internal Peripheral
AMCC
23
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
