405GPr – Power PC 405GPr Embedded Processor
Revision 2.00 – December 2, 2004
Data Sheet
DCR Address Map
4KB Device Configuration Registers
Function
Total DCR Address Space
1
By function:
Reserved
Memory Controller Registers
External Bus Controller Registers
Decompression Controller Registers
Reserved
On-Chip Memory Controller Registers
Reserved
PLB Registers
Reserved
OPB Bridge Out Registers
Electronic Chip ID (ECID)
Reserved
Clock, Control, Interrupt Routing, and Reset
Power Management
Interrupt Controller
Reserved
DMA Controller Registers
Reserved
Ethernet MAL Registers
Reserved
Notes:
1. DCR address space is addressable with up to 10 bits (1024 or 1K unique addresses). Each unique address represents a single 32-bit
(word) register, or 1 kiloword (KW) (which equals 4 KB).
0x000
0x010
0x012
0x014
0x016
0x018
0x020
0x080
0x090
0x0A0
0x0A8
0x0AA
0x0B0
0x0B8
0x0C0
0x0D0
0x100
0x140
0x180
0x200
0x00F
0x011
0x013
0x015
0x017
0x01F
0x07F
0x08F
0x09F
0x0A7
0x0A9
0x0AF
0x0B7
0x0BF
0x0CF
0x0FF
0x13F
0x17F
0x1FF
0x3FF
16W
2W
2W
2W
2W
8W
96W
16W
16W
8W
2W
6W
8W
8W
16W
48W
64W
64W
128W
512W
Start Address
0x000
End Address
0x3FF
Size
1KW (4KB)
1
8
AMCC
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
