Revision 1.27 - August 22, 2007
PPC405EZ – PowerPC 405EZ Embedded Processor
Preliminary Data Sheet
In the following table, only the primary (default) signal name is shown for each ball. Multiplexed or multifunction
signals are marked with an asterisk (*). To determine what signals or functions are multiplexed on those balls, look
up the primary signal name in “Signals Listed Alphabetically” on page 17.The following table lists the signals by ball
assignment.
Table 4. Signals Listed by Ball Assignment (Sheet 1 of 6)
Ball
A01
Signal Name
Ball
B01
Signal Name
UART0_Rx
Ball
C01
Signal Name
CAN0_TxE
Ball
D01
Signal Name
UART0_DSR*
GND
GND
A02
A03
A04
A05
A06
A07
B02
B03
B04
B05
B06
B07
GND
C02
C03
C04
C05
C06
C07
CAN0_Rx
GND
D02
D03
D04
D05
D06
D07
UART0_DCD*
UART0_Tx
GND
CAN1_TxE
PWM_DivClk*
GND
CAN0_Tx
CAN1_Tx
PWM_14*
DAC_VRef
DAC_GRef
CAN1_Rx
PWM_16*
PWM_12*
PWM_13*
OVDD
1
DAC_IOutP
DAC_AGND
DAC_AVDD
GND
OVDD
1
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
B08
B09
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
DAC_CRef
DAC_IRRef
PWM_10*
PWM_7
C08
C09
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
DAC_IPTrig*
GND
D08
D09
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
GND
GND
VDD
GND
PWM_9*
PWM_6
PWM_5
PWM_4
GND
PWM_11*
PWM_8*
PWM_2
OVDD1
PWM_3
GND
VDD
PWM_1
PWM_OE3*
GPIO121
IIC0SData
SPI_DO
DebugEn
Halt
PWM_TBA
PWM_OE1*
IIC0SClk
SPI_ClkOut
SysReset
Reserved
SysErr
SPI_SS1*
GND
PWM_OE2*
PWM_OE0
SPI_SS0
GND
OVDD
1
SPI_DI
OVDD
GND
1
DMAAck*
DMAEOT/TC*
TestEn
DMAReq*
GND
BusReq*
HoldPri*
HoldReq*
GND
PerReady*
HoldAck*
GND
CRAM_AdV*
28
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
