Revision 1.10 - July 10, 2008
PPC405EXr – PowerPC 405EXr Embedded Processor
Preliminary Data Sheet
Table 7. Signal Functional Description (Sheet 7 of 7)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 39 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 39 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
Notes
Power
VDD
Logic Supply (+1.2V).
I/O Supply (+3.3V).
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
na
OVDD
SVDD
EOVDD
DDR1/2 SDRAM Supply (+2.5V or +1.8V)
Ethernet I/O Supply (+2.5V)
GND
Ground.
SAVDD
System PLL Analog Supply (+2.5V).
System PLL Analog Ground.
SAGND
EAVDD
Ethernet PLL Analog Supply (+2.5V).
Ethernet PLL Analog Ground.
EAGND
AVDD
PCI-Express SerDes Analog Supply (+1.2V)
PCI-Express SerDes PLL Analog Supply (+2.5V).
PCI-Express Analog Ground (for AHVDD and AVDD)
AHVDD
AGND
Other
.
To avoid noise pickup problems, these balls must be connected in
any board design as shown Table 6 on page 40.
Reserved
na
na
na
AMCC Proprietary
47