Revision 1.10 - July 10, 2008
PPC405EXr – PowerPC 405EXr Embedded Processor
Signal Lists
Preliminary Data Sheet
The following table lists all the external signals in alphabetical order and shows the ball (pin) number on which the
signal appears. Shared signals are shown with the default signal (following reset) not in brackets and the alternate
signal in brackets. Signals that have different functions for different modes with the same function are separated by
commas.
Shared signals appear alphabetically multiple times in the list—once for each signal name on the ball. The Page
column indicates the page within the table “Signal Functional Description” on page 41 on which the signals in the
indicated interface group begin.
Table 3. Signals Listed Alphabetically (Sheet 1 of 14)
Signal Name
Ball
K01
Interface Group
Page
AGND
AGND
AGND
AGND
AHVDD
L04
P04
R01
M04
Power
Power
47
47
47
AHVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
R04
J03
K04
M01
N03
N04
P01
Power
T01
BA0
AD22
AF24
AE24
AF21
AE20
B03
BA1
DDR 2/1 SDRAM
DDR 2/1 SDRAM
45
45
BA2
BankSel0
BankSel1
BusReq[GPIO27][DMAEOT3][IRQ5]
CAS
External Bus Master
DDR 2/1 SDRAM
44
45
AF20
M25
T26
DM0
DM1
DM2
AD16
AD13
Y26
DDR 2/1 SDRAM
45
DM3
DM4
[DMAAck0]PerAddr07[TS1]
[DMAAck1]GPIO31[IRQ0]
[DMAAck2][HoldReq]GPIO22
[DMAAck3][ExtAck]GPIO25[IRQ3]
[DMAEOT0][PerAddr05]GPIO26[TS3]
[DMAEOT1]GPIO29[IRQ2]
[DMAEOT2][ExtReq]GPIO24[IRQ4]
[DMAEOT3][BusReq]GPIO27[IRQ5]
[DMAReq0]PerAddr06[TS2]
[DMAReq1]GPIO30[IRQ1]
[DMAReq2][HoldAck]GPIO23
[DMAReq3]PerAddr08[TS0]
J26
D01
B05
DMA
DMA
DMA
44
44
C04
K26
D03
A03
B03
K25
D02
C05
J25
44
18
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
