Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
Table 3. Signals Listed Alphabetically (Sheet 6 of 17)
Signal Name
GPIO1_00[HDLCMPTxClk4][PHY1RxD0][PHY1Rx2D0]
GPIO1_01[HDLCMPTxData4][PHY1RxD1][PHY1Rx2D1]
GPIO1_02[HDLCMPTxEn4][PHY1RxD2][PHY1Rx3D0]
GPIO1_03[HDLCMPRxClk4][PHY1RxD3][PHY1Rx3D1]
GPIO1_04[HDLCMPRxData4][EMC1TxD0][EMC1Tx2D0]
GPIO1_05[HDLCMPTxClk5][EMC1TxD1][EMC1Tx2D1]
GPIO1_06[HDLCMPTxData5][EMC1TxD2][EMC1Tx3D0]
GPIO1_07[HDLCMPTxEn5][EMC1TxD3][EMC1Tx3D1]
GPIO1_08[HDLCMPRxClk5][PHY1RxErr][PHY1Rx2Er]
GPIO1_09[HDLCMPRxData5][PHY1RxDV][PHY1CrS3DV]
GPIO1_10[HDLCMPTxClk6][PHY1CrS][PHY1CrS2DV]
GPIO1_11[HDLCMPTxData6][EMC1TxErr][EMC1Tx3En]
GPIO1_12[HDLCMPTxEn6][EMC1TxEn][EMC1Tx2En]
GPIO1_13[HDLCMPRxClk6][PHY1RxClk]
GPIO1_14[HDLCMPRxData6][PHY1Col][PHY1Rx3Er]
GPIO1_15[HDLCMPTxClk7]
Ball
D25
A27
C26
B27
A28
C27
B28
D27
C28
B29
A30
C29
B30
A31
B32
D29
C30
A32
B31
C31
D33
C34
E32
F31
Interface Group
Page
System
51
GPIO1_16[HDLCMPTxData7]
GPIO1_17[HDLCMPTxEn7][PHY1TxClk]
GPIO1_18[HDLCMPRxClk7]
GPIO1_19[HDLCMPRxData7]
GPIO1_20[HDLCMPTxEn0][UART1_CTS]
GPIO1_21[HDLCMPTxEn1][UART1_DSR]
GPIO1_22[HDLCMPTxEn2][UART1_DCD]
GPIO1_23[HDLCMPTxEn3][UART1_RI]
GPIO1_24[HDLCEXTxEnA][UART1_RTS]
GPIO1_25[HDLCEXTxEnB][UART1_DTR]
GPIO1_26[UART0_CTS]
C33
D34
E33
F32
GPIO1_27[UART0_DSR]
GPIO1_28[UART0_DCD]
E34
F33
GPIO1_29[UART0_RI]x
GPIO1_30[UART0_RTS]
G32
H31
N33
AJ31
AK33
AL34
AM33
AL32
AK32
AM34
C33
D34
AL33
GPIO1_31[UART0_DTR]
Halt
System
51
44
HDLCEXRxClk
HDLC 32-Channel
HDLCEXRxDataA
HDLC 32-Channel
44
HDLCEXRxDataB
HDLCEXRxFS
HDLC 32-Channel
HDLC 32-Channel
44
44
HDLCEXTxClk
HDLCEXTxDataA
HDLC 32-Channel
44
HDLCEXTxDataB
[HDLCEXTxEnA]GPIO1_24[UART1_RTS]
[HDLCEXTxEnB]GPIO1_25[UART1_DTR]
HDLCEXTxFS
HDLC 32-Channel
HDLC 32-Channel
44
44
20
DS2011
AMCC Proprietary