Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
Table 14. I/O Specifications—All (Sheet 2 of 2)
Notes:
1. PCI timings are for asynchronous operation up to 66MHz. PCI output hold time requirement is 1ns for 66MHz and 2ns for
33MHz.
Input (ns)
Output (ns)
Output Current (mA)
I/O H I/O L
(maximum) (minimum)
Signal
JTAG Interface
Clock
Notes
Setup Time Hold Time Valid Delay Hold Time
(T min)
(T min)
(T
OV
max)
(T min)
OH
IS
IH
TCK
async
async
n/a
async
async
n/a
n/a
n/a
n/a
n/a
12
n/a
n/a
8
TDI
n/a
async
n/a
n/a
async
n/a
TDO
TMS
async
async
async
async
n/a
n/a
n/a
n/a
TRST
n/a
n/a
System Interface
GPIO0:1
Halt
na
async
n/a
na
async
n/a
na
n/a
na
n/a
12
n/a
n/a
12
8
n/a
n/a
8
SysClk
SysErr
SysReset
TestEn
TmrClk
n/a
n/a
n/a
n/a
8.6
3.7
n/a
n/a
7.4
3.3
12
8
dc
dc
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
async
async
AMCC Proprietary
DS2011
61
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
