Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
SIGNAL LISTS
Data Sheet
The following table lists all the external signals in alphabetical order and shows the ball number on which the signal
appears. Multiplexed signals are shown with the default signal (following reset) not in brackets and the alternate
signal or signals in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each sig-
nal name on the ball. The page number listed gives the page in “Signal Functional Description” on page 43 where
the signals in the indicated interface group begin.
SIGNALS LISTED ALPHABETICALLY
Table 3. Signals Listed Alphabetically (Sheet 1 of 17)
Signal Name
Ball
Interface Group
Page
AV
P31
Power
51
DD
BA0
AN31
AM31
AL21
AP23
AM22
AN23
D01
SDRAM
46
46
BA1
BankSel0
BankSel1
SDRAM
PCI
BankSel2
BankSel3
[BE0]PCIC0
[BE1]PCIC1
[BE2]PCIC2
[BE3]PCIC3
BusReq
B06
43
B10
C15
H03
External Master Peripheral Bus
SDRAM
49
46
CAS
AN22
AP21
AN21
AB34
AB33
AA31
AC34
AA34
W32
ClkEn0
SDRAM
46
ClkEn1
[DMAAck0]GPIO0_13
[DMAAck1]GPIO0_14
[DMAAck2]GPIO0_15
External Slave Peripheral Bus
47
[DMAAck3]GPIO0_16[PerCS5]
[DMAReq0]GPIO0_09
[DMAReq1]GPIO0_10
External Slave Peripheral Bus
47
[DMAReq2]GPIO0_11
AA33
AA32
AN20
AN15
AP12
AN09
AM20
AP24
AN24
AM24
AN25
AP26
AM25
AN26
AL25
C21
[DMAReq3]GPIO0_12[PerCS4]
DQM0
DQM1
DQM2
DQM3
DQMCB
ECC0
SDRAM
SDRAM
46
46
ECC1
ECC2
ECC3
SDRAM
Ethernet
46
44
ECC4
ECC5
ECC6
ECC7
EMC0MDClk
AMCC Proprietary
DS2011
15
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
