Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
RECOMMENDED DC OPERATING CONDITIONS
Table 9. Recommended DC Operating Conditions
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Notes:
1. PCI drivers meet PCI specifications.
Parameter
Logic Supply Voltage
Symbol
Minimum
+2.3
Typical
+2.5
Maximum
+2.7
Unit
V
Notes
VDD
OVDD
AVDD
I/O Supply Voltage
PLL Supply Voltage
+3.0
+3.3
+3.6
V
+2.3
+2.5
+2.7
V
Input Logic High (3.3V LVTTL
receivers)
VIH
VIH
VIH
OVDD
VDD
+2.0
+1.7
+2.0
V
V
V
Input Logic High (2.5V CMOS
receivers)
Input Logic High (5.0V LVTTL
receivers)
+5.5
VIL
VOH
VOL
Input Logic Low
Output Logic High
Output Logic Low
0
+2.4
0
+0.8
V
V
V
OVDD
+0.4
±10
3.3V I/O input current (no pull-up or
pull-down)
IIL1
µA
IIL2
IIL3
Input Current (with internal pull-down)
Input Current (with internal pull-up)
±10 (@ 0V)
-250 (@ 0V)
400 (@ 3.6V)
±10 (@ 3.6V)
µ
A
A
µ
Input Max Allowable Overshoot (2.5V
CMOS receivers)
V
V
+ 0.6
V
IMAO25
DD
Input Max Allowable Overshoot (3.3V
LVTTL receivers)
VIMAO3
OVDD + 0.6
+5.5
V
V
V
V
Input Max Allowable Overshoot (5.0V
LVTTL receivers)
VIMAO5
Input Max Allowable Undershoot
(3.3V or 5.0V receivers)
VIMAU
-
-
0.6
Output Max Allowable Overshoot
(3.3V or 5.0V receivers)
VOMAO
OVDD + 0.3
Output Max Allowable Undershoot
(3.3V and 5.0V receivers)
VOMAU3
TC
V
0.6
40
Case Temperature
+85
×C
-
Notes:
1. See “” on page 54
AMCC Proprietary
DS2011
53