Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
Table 3. Signals Listed Alphabetically (Sheet 7 of 17)
Signal Name
Ball
G33
H33
H34
N34
B27
C28
A31
B31
G34
J32
Interface Group
Page
HDLCMPRxClk0
HDLCMPRxClk1
HDLCMPRxClk2
HDLCMPRxClk3
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
HDLC 8-Port
44
[HDLCMPRxClk4]GPIO1_03[PHY1RxD3][PHY1Rx3D1]
[HDLCMPRxClk5]GPIO1_08[PHY1RxErr][PHY1Rx2Er]
[HDLCMPRxClk6]GPIO1_13[PHY1RxClk]
[HDLCMPRxClk7]GPIO1_18]
44
44
44
44
44
44
44
HDLCMPRxData0
HDLCMPRxData1
HDLCMPRxData2
K31
P32
A28
B29
B32
C31
P33
P34
R33
T33
D25
C27
A30
D29
T32
R32
U32
T34
A27
B28
C29
C30
D33
C34
E32
F31
C26
D27
B30
A32
H01
K04
J02
HDLCMPRxData3
[HDLCMPRxData4]GPIO1_04[EMC1TxD0][EMC1Tx2D0]
[HDLCMPRxData5]GPIO1_09[PHY1RxDV][PHY1CrS3DV]
[HDLCMPRxData6]GPIO1_14[PHY1Col][PHY1Rx3Er]
[HDLCMPRxData7]GPIO1_19
HDLCMPTxClk0
HDLCMPTxClk1
HDLCMPTxClk2
HDLCMPTxClk3
[HDLCMPTxClk4]GPIO1_00[PHY1RxD0][PHY1Rx2D0]
[HDLCMPTxClk5]GPIO1_05[EMC1TxD1][EMC1Tx2D1]
[HDLCMPTxClk6]GPIO1_10[PHY1CrS][PHY1CrS2DV]
[HDLCMPTxClk7]GPIO1_15
HDLCMPTxData0
HDLCMPTxData1
HDLCMPTxData2
HDLCMPTxData3
[HDLCMPTxData4]GPIO1_01[PHY1RxD1][PHY1Rx2D1]
[HDLCMPTxData5]GPIO1_06[EMC1TxD2][EMC1Tx3D0]
[HDLCMPTxData6]GPIO1_11[EMC1TxErr][EMC1Tx3En]
[HDLCMPTxData7]GPIO1_16
[HDLCMPTxEn0]GPIO1_20[UART1_CTS]
[HDLCMPTxEn1[GPIO1_21[UART1_DSR]
[HDLCMPTxEn2]GPIO1_22[UART1_DCD]
[HDLCMPTxEn3]GPIO1_23[UART1_RI]
[HDLCMPTxEn4]GPIO1_02[PHYRx3D0]
[HDLCMPTxEn5]GPIO1_07[EMC0Tx3D1]
[HDLCMPTxEn6]GPIO1_12[EMC0Tx2En]
[HDLCMPTxEn7]GPIO1_17[PHY1TxClk]
HoldAck
HDLC 8-Port
44
HoldPri
External Master Peripheral Bus
Internal Peripheral Bus
49
49
HoldReq
IICSCL[IECSCL]
AK34
AJ32
IICSDA[IECSDA]
AMCC Proprietary
DS2011
21
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
