Revision 1.01 – April 18, 2007
NPe405H – PowerNP NPe405H Embedded Processor
Data Sheet
Table 3. Signals Listed Alphabetically (Sheet 16 of 17)
Signal Name
Ball
K33
Interface Group
Page
TCK
JTAG
50
[TC0/EOT0]GPIO0_24
[TC1/EOT1]GPIO0_25
[TC2/EOT2]GPIO0_26
[TC3/EOT3]GPIO0_27
TDI
AF34
AE32
AF33
AE31
N32
J34
External Slave Peripheral Bus
47
JTAG
JTAG
System
System
JTAG
Trace
JTAG
50
50
51
51
50
51
50
TDO
TestEn
M33
D32
H32
AH34
L34
TmrClk
TMS
[TrcClk]GPIO0_31
TRST
[TS1E]GPIO0_01
[TS2E]GPIO0_02
[TS1O]GPIO0_03
[TS2O]GPIO0_04
[TS3]GPIO0_05
[TS4]GPIO0_06
[TS5]GPIO0_07
[TS6]GPIO0_08
[UART0_CTS]GPIO1_26
[UART0_DCD]GPIO1_28
[UART0_DSR]GPIO1_27
[UART0_DTR]GPIO1_31
[UART0_RI]GPIO1_29
[UART0_RTS]GPIO1_30
UART0_Rx
U33
V33
Trace
Trace
51
51
V34
W34
W33
V32
Trace
51
Y33
Y32
E33
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
Internal Peripheral
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
E34
F32
H31
F33
G32
AG32
AH33
D33
E32
UART0_Tx
[UART1_CTS]GPIO1_20[HDLCMPTxEn0]
[UART1_DCD]GPIO1_22[HDLCMPTxEn2]
[UART1_DSR]GPIO1_21[HDLCMPTxEn1]
[UART1_DTR]GPIO1_25[HDLCMPTxEnB]
[UART1_RI]GPIO1_23[HDLCMPTxEn3]
[UART1_RTS]GPIO1_24[HDLCMPTxEnA]
UART1_Rx
C34
D34
F31
C33
AH32
AJ33
AG31
UART1_Tx
UARTSerClk
30
DS2011
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
