Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
Signals Listed Alphabetically (Part 9 of 11)
Signal Name
Ball
J04
Interface Group
Page
PerData00
PerData01
PerData02
PerData03
PerData04
PerData05
PerData06
PerData07
PerData08
PerData09
PerData10
PerData11
PerData12
PerData13
PerData14
PerData15
PerErr
G01
G02
H03
F01
F02
G03
E02
D02
F03
D01
C02
E03
C01
D03
F04
J21
External Peripheral Bus
34
Note: PerData00 is the most significant bit (msb)
on this bus.
External Peripheral Bus
External Peripheral Bus
34
34
PerOE
D14
B01
A02
A16
B16
B13
C13
A13
W17
Y18
Y17
PerPar0
External Peripheral Bus
34
PerPar1
PerR/W
External Peripheral Bus
External Peripheral Bus
34
34
PerReady
PerWBE0
PerWBE1
[PerWE]GPIO31
PHY0Col[PHY0Rx1Er]
External Peripheral Bus
34
External Peripheral Bus
Ethernet
34
32
32
32
32
32
PHY0CrS[PHY0CrS0DV]
[PHY0CrS1DV]PHY0RxDV
PHY0RxClk
Ethernet
Ethernet
AB19 Ethernet
[PHY0RefClk]PHY0TxClk
PHY0RxD0[PHY0Rx0D0][PHY0Rx0D]
PHY0RxD1[PHY0Rx0D1][PHY0Rx1D]
PHY0RxD2[PHY0Rx1D0]
PHY0RxD3[PHY0Rx1D1]
PHY0RxDV[PHY0CrS1DV]
PHY0RxErr[PHY0Rx0Er]
[PHY0Rx0Er]PHY0RxErr
PHY0TxClk[PHY0RefClk]
RAS
Y19
Y15
Ethernet
Ethernet
Ethernet
Y16
32
AA18
AA19
Y17
32
32
32
32
33
37
37
37
36
AA20 Ethernet
AA20 Ethernet
Y19
Ethernet
AB12 SDRAM
SysClk
G22
C21
A21
J19
System
System
System
JTAG
SysErr
SysReset
TCK
21