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EPM9560A 参数 Datasheet PDF下载

EPM9560A图片预览
型号: EPM9560A
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件
文件页数/大小: 46 页 / 495 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX 9000 Programmable Logic Device Family Data Sheet  
Notes:  
(1) All pins not listed are user I/ O pins.  
(2) Perform a complete thermal analysis before committing a design to this device package. See Application Note 74  
(Evaluating Power for Altera Devices).  
(3) EPM9320A devices are not offered in this package.  
(4) During in-system programming, each devices VPPpin must be connected to the 5.0-V power supply. During  
normal device operation, the VPPpin is pulled up internally and can be connected to the 5.0-V supply or left  
unconnected.  
(5) The user I/ O pin count includes dedicated input pins and all I/ O pins.  
Table 27. EPM9400 Dedicated Pin-Outs  
Note (1)  
Pin Name 84-Pin PLCC (2)  
208-Pin RQFP  
240-Pin RQFP  
DIN1(GCLK1)  
2
182  
183  
153  
4
210  
211  
187  
234  
91  
DIN2(GCLK2)  
DIN3(GCLR)  
DIN4(GOE)  
TCK  
1
12  
74  
43  
54  
42  
31  
78  
TMS  
49  
68  
TDI  
79  
92  
TDO  
108  
114  
GND  
6, 13, 20, 26, 27, 47, 60, 14, 20, 24, 31, 35, 41, 42, 5, 14, 25, 34, 45, 54, 65,  
66, 69, 73  
43, 44, 46, 47, 66, 85, 102, 66, 81, 96, 110, 115, 126,  
110, 113, 114, 115, 116,  
118, 121, 122, 132, 133,  
143, 152, 170, 189, 206  
127, 146, 147, 166, 167,  
186, 200, 216, 229  
VCCINT(5.0 V only)  
VCCIO(3.3 or 5.0 V)  
16, 23, 30, 56, 63, 70  
17, 37, 59, 80  
10, 19, 30, 45, 112, 128,  
139, 148  
4, 24, 44, 64, 117, 137,  
157, 177  
5, 25, 36, 55, 72, 91, 111, 15, 35, 55, 73, 86, 101,  
127, 138, 159, 176, 195  
116, 136, 156, 176, 192,  
205, 220, 235  
No Connect (N.C.)  
6, 7, 8, 9, 11, 12, 13, 109, 1, 2, 3, 6, 7, 8, 9, 10, 11,  
144, 145, 146, 147, 149,  
150, 151  
12, 13, 168, 169, 170,  
171, 172, 173, 174, 175,  
178, 179, 180, 181, 182,  
183, 184, 185, 236, 237,  
238, 239, 240  
VPP(3)  
55  
59  
48  
67  
Total User I/O Pins (4)  
139  
159  
Notes:  
(1) All pins not listed are user I/ O pins.  
(2) Perform a complete thermal analysis before committing a design to this device package. See Application Note 74  
(Evaluating Power for Altera Devices) for more information.  
(3) During in-system programming, each devices VPPpin must be connected to the 5.0-V power supply. During  
normal device operation, the VPPpin is pulled up internally and can be connected to the 5.0-V supply or left  
unconnected.  
(4) The user I/ O pin count includes dedicated input pins and all I/ O pins.  
40  
Altera Corporation  
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