MAX 7000B Programmable Logic Device Data Sheet
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Additional design entry and simulation support provided by
EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized
modules (LPMs), Verilog HDL, VHDL, and other interfaces to
popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys,
Synplicity, and VeriBest
Programming support with Altera’s Master Programming Unit
(MPU), MasterBlasterTM serial/universal serial bus (USB)
communications cable, and ByteBlasterMVTM parallel port
download cable, as well as programming hardware from third-
party manufacturers and any JamTM STAPL File (.jam), Jam Byte-
Code File (.jbc), or Serial Vector Format File (.svf)-capable in-
circuit tester
MAX 7000B devices are high-density, high-performance devices based on
Altera’s second-generation MAX architecture. Fabricated with advanced
CMOS technology, the EEPROM-based MAX 7000B devices operate with
a 2.5-V supply voltage and provide 600 to 10,000 usable gates, ISP,
pin-to-pin delays as fast as 3.5 ns, and counter speeds up to 303.0 MHz.
See Table 2.
General
Description
Table 2. MAX 7000B Speed Grades
Note (1)
Speed Grade
Device
-3
-4
-5
-7
-10
EPM7032B
v
v
v
v
v
v
v
v
EPM7064B
v
EPM7128B
EPM7256B
EPM7512B
v
v
v
v
v
v
Notes:
(1) Contact Altera Marketing for up-to-date information on available device speed
grades.
The MAX 7000B architecture supports 100% TTL emulation and high-
density integration of SSI, MSI, and LSI logic functions. It easily integrates
multiple devices ranging from PALs, GALs, and 22V10s to MACH and
pLSI devices. MAX 7000B devices are available in a wide range of
packages, including PLCC, BGA, FineLine BGA, 0.8-mm Ultra FineLine
BGA, PQFP, TQFP, and TQFP packages. See Table 3.
Altera Corporation
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ALTERA [ ALTERA CORPORATION ]
