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EPM7512AEFI256-10 参数 Datasheet PDF下载

EPM7512AEFI256-10图片预览
型号: EPM7512AEFI256-10
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件 [Programmable Logic Device]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 64 页 / 1018 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX 7000A Programmable Logic Device Data Sheet  
Macrocells  
MAX 7000A macrocells can be individually configured for either  
sequential or combinatorial logic operation. The macrocells consist of  
three functional blocks: the logic array, the product-term select matrix,  
and the programmable register. Figure 2 shows a MAX 7000A macrocell.  
Figure 2. MAX 7000A Macrocell  
Global Global  
LAB Local Array  
Clear  
Clocks  
From  
2
I/O pin  
Parallel Logic  
Expanders  
(from other  
macrocells)  
Fast Input  
Select  
Programmable  
Register  
Register  
Bypass  
To I/O  
Control  
Block  
PRN  
D/T  
Q
Clock/  
Enable  
Select  
Product-  
Term  
Select  
Matrix  
ENA  
CLRN  
VCC  
Clear  
Select  
To PIA  
Shared Logic  
Expanders  
36 Signals  
from PIA  
16 Expander  
Product Terms  
Combinatorial logic is implemented in the logic array, which provides  
five product terms per macrocell. The product-term select matrix allocates  
these product terms for use as either primary logic inputs (to the ORand  
XORgates) to implement combinatorial functions, or as secondary inputs  
to the macrocell’s register preset, clock, and clock enable control  
functions.  
Two kinds of expander product terms (“expanders”) are available to  
supplement macrocell logic resources:  
Shareable expanders, which are inverted product terms that are fed  
back into the logic array  
Parallel expanders, which are product terms borrowed from adjacent  
macrocells  
The Altera development system automatically optimizes product-term  
allocation according to the logic requirements of the design.  
8
Altera Corporation