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EPM7192SQC160-10 参数 Datasheet PDF下载

EPM7192SQC160-10图片预览
型号: EPM7192SQC160-10
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件输入元件LTE时钟
文件页数/大小: 62 页 / 1087 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX 7000 Programmable Logic Device Family Data Sheet  
Open-Drain Output Option (MAX 7000S Devices Only)  
MAX 7000S devices provide an optional open-drain (functionally  
equivalent to open-collector) output for each I/ O pin. This open-drain  
output enables the device to provide system-level control signals (e.g.,  
interrupt and write enable signals) that can be asserted by any of several  
devices. It can also provide an additional wired-ORplane.  
By using an external 5.0-V pull-up resistor, output pins on MAX 7000S  
devices can be set to meet 5.0-V CMOS input voltages. When VCCIO is  
3.3 V, setting the open drain option will turn off the output pull-up  
transistor, allowing the external pull-up resistor to pull the output high  
enough to meet 5.0-V CMOS input voltages. When VCCIO is 5.0 V, setting  
the output drain option is not necessary because the pull-up transistor will  
already turn off when the pin exceeds approximately 3.8 V, allowing the  
external pull-up resistor to pull the output high enough to meet 5.0-V  
CMOS input voltages.  
Slew-Rate Control  
The output buffer for each MAX 7000E and MAX 7000S I/ O pin has an  
adjustable output slew rate that can be configured for low-noise or high-  
speed performance. A faster slew rate provides high-speed transitions for  
high-performance systems. However, these fast transitions may introduce  
noise transients into the system. A slow slew rate reduces system noise,  
but adds a nominal delay of 4 to 5 ns. In MAX 7000E devices, when the  
Turbo Bit is turned off, the slew rate is set for low noise performance. For  
MAX 7000S devices, each I/ O pin has an individual EEPROM bit that  
controls the slew rate, allowing designers to specify the slew rate on a  
pin-by-pin basis.  
MAX 7000 devices can be programmed on Windows-based PCs with the  
Altera Logic Programmer card, the Master Programming Unit (MPU),  
and the appropriate device adapter. The MPU performs a continuity  
check to ensure adequate electrical contact between the adapter and the  
device.  
Programming  
with External  
Hardware  
For more information, see the Altera Programming Hardware Data Sheet.  
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The Altera development system can use text- or waveform-format test  
vectors created with the Text Editor or Waveform Editor to test the  
programmed device. For added design verification, designers can  
perform functional testing to compare the functional behavior of a  
MAX 7000 device with the results of simulation. Moreover, Data I/ O, BP  
Microsystems, and other programming hardware manufacturers also  
provide programming support for Altera devices.  
For more information, see the Programming Hardware Manufacturers.  
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Altera Corporation  
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