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EPM240T100I5N 参数 Datasheet PDF下载

EPM240T100I5N图片预览
型号: EPM240T100I5N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16 MM, 0.50 MM PITCH, LEAD FREE, TQFP-100]
分类和应用: 输入元件可编程逻辑
文件页数/大小: 88 页 / 838 K
品牌: ALTERA [ ALTERA CORPORATION ]
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2–22
Chapter 2: MAX II Architecture
MultiVolt Core
Figure 2–17.
EPM570, EPM1270, and EPM2210 UFM Block LAB Row Interface
CFM Block
RTP_BUSY
BUSY
OSC
DRDout
DRDin
DRDCLK
DRDSHFT
ARDin
PROGRAM
ERASE
OSC_ENA
ARCLK
ARSHFT
UFM Block
LAB
LAB
LAB
MultiVolt Core
The MAX II architecture supports the MultiVolt core feature, which allows MAX II
devices to support multiple V
CC
levels on the V
CCINT
supply. An internal linear voltage
regulator provides the necessary 1.8-V internal voltage supply to the device. The
voltage regulator supports 3.3-V or 2.5-V supplies on its inputs to supply the 1.8-V
internal voltage to the device, as shown in
The voltage regulator is not
guaranteed for voltages that are between the maximum recommended 2.5-V
operating voltage and the minimum recommended 3.3-V operating voltage.
The MAX IIG and MAX IIZ devices use external 1.8-V supply. The 1.8-V V
CC
external
supply powers the device core directly.
Figure 2–18.
MultiVolt Core Feature in MAX II Devices
3.3-V or 2.5-V on
VCCINT Pins
Voltage
Regulator
1.8-V on
VCCINT Pins
1.8-V Core
Voltage
1.8-V Core
Voltage
MAX II Device
MAX IIG or MAX IIZ Device