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EPM240T100C5 参数 Datasheet PDF下载

EPM240T100C5图片预览
型号: EPM240T100C5
PDF下载: 下载PDF文件 查看货源
内容描述: [最大II器件]
分类和应用: 可编程逻辑器件输入元件PC
文件页数/大小: 295 页 / 3815 K
品牌: ALTERA [ ALTERA CORPORATION ]
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9–24  
Chapter 9: Using User Flash Memory in MAX II Devices  
Software Support for UFM Block  
Figure 9–24. Page 4 of the altufm MegaWizard Plug-In Manager (I2C)  
Serial Peripheral Interface  
Serial peripheral interface (SPI) is a four-pin serial communication subsystem  
included on the Motorola 6805 and 68HC11 series microcontrollers. It allows the  
microcontroller unit to communicate with peripheral devices, and is also capable of  
inter-processor communications in a multiple-master system.  
The SPI bus consists of masters and slaves. The master device initiates and controls  
the data transfers and provides the clock signal for synchronization. The slave device  
responds to the data transfer request from the master device. The master device in an  
SPI bus initiates a service request with the slave devices responding to the service  
request.  
With the altufm megafunction, the UFM and MAX II logic can be configured as a  
slave device for the SPI bus. The OSC_ENAis always asserted to enable the internal  
oscillator when the SPI megafunction is instantiated for both read only and  
read/write interfaces.  
The Quartus II software supports both the Base mode (which uses 8-bit address and  
data) and the Extended mode (which uses 16-bit address and data). Base mode uses  
only UFM sector 0 (2,048 bits), whereas Extended mode uses both UFM sector 0 and  
sector 1 (8,192 bits). There are only four pins in SPI: SI, SO, SCK, and nCS. Table 9–9  
describes the SPI pins and functions.  
MAX II Device Handbook  
© October 2008 Altera Corporation  
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