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EPM1270GF100A 参数 Datasheet PDF下载

EPM1270GF100A图片预览
型号: EPM1270GF100A
PDF下载: 下载PDF文件 查看货源
内容描述: MAX II器件系列 [MAX II Device Family]
分类和应用:
文件页数/大小: 86 页 / 1216 K
品牌: ALTERA [ ALTERA CORPORATION ]
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2–24  
Chapter 2: MAX II Architecture  
I/O Structure  
Figure 2–19. MAX II IOE Structure  
Data_in Fast_out  
Data_out OE  
DEV_OE  
Optional  
PCI Clamp (1)  
Programmable  
Pull-Up  
V
V
CCIO  
CCIO  
I/O Pin  
Optional Bus-Hold  
Circuit  
Drive Strength Control  
Open-Drain Output  
Slew Control  
Optional Schmitt  
Trigger Input  
Programmable  
Input Delay  
Note to Figure 2–19:  
(1) Available in EPM1270 and EPM2210 devices only.  
I/O Blocks  
The IOEs are located in I/O blocks around the periphery of the MAX II device. There  
are up to seven IOEs per row I/O block (5 maximum in the EPM240 device) and up to  
four IOEs per column I/O block. Each column or row I/O block interfaces with its  
adjacent LAB and MultiTrack interconnect to distribute signals throughout the device.  
The row I/O blocks drive row, column, or DirectLink interconnects. The column I/O  
blocks drive column interconnects.  
MAX II Device Handbook  
© October 2008 Altera Corporation