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EPM1270GF256A4N 参数 Datasheet PDF下载

EPM1270GF256A4N图片预览
型号: EPM1270GF256A4N
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash PLD, 8.1ns, 980-Cell, CMOS, PBGA256, 17 X 17 MM, 1 MM PITCH, LEAD FREE, FBGA-256]
分类和应用: LTE输入元件可编程逻辑
文件页数/大小: 108 页 / 1342 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Section I. MAX II Device
Family Data Sheet
This section provides designers with the data sheet specifications for
MAX
®
II devices. The chapters contain feature definitions of the internal
architecture, Joint Test Action Group (JTAG) and in-system
programmability (ISP) information, DC operating conditions, AC timing
parameters, and ordering information for MAX II devices.
This section includes the following chapters:
Chapter 1. Introduction
Chapter 2. MAX II Architecture
Chapter 3. JTAG and In-System Programmability
Chapter 4. Hot Socketing and Power-On Reset in MAX II Devices
Chapter 5. DC and Switching Characteristics
Chapter 6. Reference and Ordering Information
Revision History
Refer to each chapter for its own specific revision history. For information
about when each chapter was updated, refer to the Chapter Revision
Dates section, which appears in the complete handbook.
Altera Corporation
Section I–1