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EPF6024AQC240-3N 参数 Datasheet PDF下载

EPF6024AQC240-3N图片预览
型号: EPF6024AQC240-3N
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 52 页 / 405 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 6000 Programmable Logic Device Family Data Sheet  
Operating Modes  
The FLEX 6000 architecture uses SRAM configuration elements that  
require configuration data to be loaded every time the circuit powers  
up. This process of physically loading the SRAM data into a FLEX  
6000 device is known as configuration. During initialization—a  
process that occurs immediately after configuration—the device  
resets registers, enables I/O pins, and begins to operate as a logic  
device. The I/O pins are tri-stated during power-up, and before and  
during configuration. The configuration and initialization processes  
of a device are referred to as command mode; normal device operation  
is called user mode.  
SRAM configuration elements allow FLEX 6000 devices to be  
reconfigured in-circuit by loading new configuration data into the  
device. Real-time reconfiguration is performed by forcing the device  
into command mode with a device pin, loading different  
configuration data, reinitializing the device, and resuming user-  
mode operation. The entire reconfiguration process requires less  
than 100 ms and is used to dynamically reconfigure an entire system.  
Also, in-field system upgrades can be performed by distributing new  
configuration files.  
Configuration Schemes  
The configuration data for a FLEX 6000 device can be loaded with  
one of three configuration schemes, which is chosen on the basis of  
the target application. An EPC1 or EPC1441 configuration device or  
intelligent controller can be used to control the configuration of a  
FLEX 6000 device, allowing automatic configuration on system  
power-up.  
Multiple FLEX 6000 devices can be configured in any of the three  
configuration schemes by connecting the configuration enable input  
(nCE) and configuration enable output (nCEO) pins on each device.  
Table 40 shows the data sources for each configuration scheme.  
Table 40. Configuration Schemes  
Configuration Scheme  
Data Source  
Configuration device  
Passive serial (PS)  
EPC1 or EPC1441 configuration device  
BitBlasterTM, ByteBlasterMVTM, or MasterBlasterTM  
download cables, or serial data source  
Passive serial asynchronous BitBlaster, ByteBlasterMV, or MasterBlaster  
(PSA) download cables, or serial data source  
50  
Altera Corporation  
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