Serial Configuration Device Memory Access
available when all the block protect bits are
0.
When any of the block
protect bits are set to one, the relevant area is protected from being
written by write bytes operations or erased by erase sector operations.
Table 4–9. Block Protection Bits in EPCS4 Devices
Status Register Content
BP2 Bit
0
0
0
0
1
1
1
1
Memory Content
Protected Area
None
Sector 7
Sectors 6 and 7
Four sectors: 4 to 7
All sectors
All sectors
All sectors
All sectors
BP1 Bit
0
0
1
1
0
0
1
1
BP0 Bit
0
1
0
1
0
1
0
1
Unprotected Area
All eight sectors: 0 to 7
Seven sectors: 0 to 6
Six sectors: 0 to 5
Four sectors: 0 to 3
None
None
None
None
Table 4–10. Block Protection Bits in EPCS1
Status Register Content
BP1 Bit
0
0
1
1
Memory Content
Protected Area
None
Sector 3
Two sectors: 2 and 3
All sectors
BP0 Bit
0
1
0
1
Unprotected Area
All four sectors: 0 to 3
Three sectors: 0 to 2
Two sectors: 0 and 1
None
The status register can be read at any time, even while a write or erase
cycle is in progress. When one of these cycles is in progress, you can check
the write in progress bit (bit
0
of the status register) before sending a new
operation to the device. The device can also read the status register
continuously, as shown in
4–14
Configuration Handbook, Volume 2
Core Version a.b.c variable
Altera Corporation
July 2004
ALTERA [ ALTERA CORPORATION ]
