Intellectual property
Altera and its partners provide
off-the-shelf intellectual
property (IP) cores. You can
use these pre-optimized cores
easily, reducing design and
test time.
Nios II embedded processor
Get the performance you need with the right feature set and keep costs down.
With the versatility of our Nios® II soft-core embedded processor, you can build
an exact-fit processor, customized for your application in minutes. A Nios II
processor implemented in a Cyclone III FPGA allows you to choose the exact set
of CPUs, peripherals, and interfaces that you need ,and to remotely upgrade in the
field. You can address changing requirements to stay competitive. You can also
increase performance without changing your board design—accelerating only
functions that need it and combining many functions onto one chip. With the
Nios II embedded processor, you’ll lower overall cost, design complexity, and
power consumption. Assemble an exact-fit processor system every time with the
world’s most versatile processor.
Low-cost development kits and free reference designs
The Cyclone III FPGA Starter Kit is available today to get your next design up
and running in hardware as quickly as possible. Whether your’re designing for
communications, embedded systems hardware or software, or vertical market areas
such as video and image processing, display, wireless, or another high-volume, cost-
sensitive application, Altera and partner development kits give you everything you
need to create and implement your design right out of the box.
Cyclone III device overview
Device features
that deliver functionality.
Device
LEs
M9K
Memory
Blocks
46
46
56
66
126
260
305
432
Total
Memory
(Mbits)
0.4
0.4
0.5
0.6
1.1
2.3
2.7
3.9
Multipliers
PLLs
Total Global
Clocks
10
10
20
20
20
20
20
20
Maximum
User I/O
Pins
182
182
346
215
535
377
428
531
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120
5,136
10,320
15,408
24,624
39,600
55,856
81,264
119,088
23
23
56
66
126
156
244
288
2
2
4
4
4
4
4
4
Cyclone III package overview
1
A selection of low-cost packages
and user I/O pin counts.
Device
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120
1
E144
94
94
84
82
Q240
F256
182
182
F324
F484
F780
U256
182
182
U484
160
148
128
168
156
215
195
346
331
327
295
283
535
377
429
531
168
156
346
331
217
295
For more information on packages, see
Cyclone FPGA Series Package and I/O Matrix
at
www.altera.com/selectorguides.
Cyclone III FPGAs • March 2007 •
www.altera.com
ALTERA [ ALTERA CORPORATION ]
