Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
9–45
Configuration Features
Figure 9–21 shows how to configure multiple devices using a MAX II device. This
circuit is similar to the FPP configuration circuit for a single device, except the
Cyclone III device family is cascaded for a multi-device configuration.
Figure 9–21. Multi-Device FPP Configuration Using an External Host
Memory
V
CCIO (2)
Cyclone III Device Family 2
10 k
V
(1)
V
(1)
CCIO
CCIO
Cyclone III Device Family 1
ADDR DATA[7..0]
10 k
10 k
(4)
(4)
MSEL[3..0]
MSEL[3..0]
CONF_DONE
CONF_DONE
nSTATUS
nSTATUS
nCE
nCE
nCEO
nCEO N.C. (3)
External Host
(MAX II Device or
Microprocessor)
GND
DATA[7..0] (5)
nCONFIG
DCLK (5)
DATA[7..0] (5)
nCONFIG
DCLK (5)
Buffers (5)
Notes to Figure 9–21:
(1) The pull-up resistor must be connected to a supply that provides an acceptable input signal for all devices in the
chain. VCC must be high enough to meet the VIH specification of the I/O on the device and the external host.
(2) Connect the pull-up resistor to the VCCIO supply voltage of the I/O bank in which the nCEpin resides.
(3) The nCEOpin is left unconnected or used as a user I/O pin when it does not feed the nCEpin of another device.
(4) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0]
,
refer to Table 9–7 on page 9–11. Connect the MSEL pins directly to VCCA or ground.
(5) All I/O inputs must maintain a maximum AC voltage of 4.1 V. DATA[7..0]and DCLKmust fit the maximum overshoot
equation outlined in “Configuration and JTAG Pin I/O Requirements” on page 9–7.
In a multi-device FPP configuration, the nCEpin of the first device is connected to
GND while its nCEOpin is connected to the nCEpin of the next device in the chain. The
nCEinput of the last device comes from the previous device while its nCEOpin is left
floating. After the first device completes configuration in a multi-device configuration
chain, its nCEOpin drives low to activate the nCEpin of the second device, which
prompts the second device to begin configuration. The second device in the chain
begins configuration in one clock cycle; therefore, the transfer of data destinations is
transparent to the MAX II device. All other configuration pins (nCONFIG
, nSTATUS,
DCLK
,
DATA[7..0], and CONF_DONE) are connected to every device in the chain. The
configuration signals may require buffering to ensure signal integrity and prevent
clock skew problems. Ensure that the DCLKand DATAlines are buffered. All devices
initialize and enter user mode at the same time because all device CONF_DONEpins are
tied together.
All nSTATUSand CONF_DONEpins are tied together and if any device detects an error,
configuration stops for the entire chain and the entire chain must be reconfigured. For
example, if the first device flags an error on nSTATUS, it resets the chain by pulling its
nSTATUSpin low. This behavior is similar to a single device detecting an error.
August 2012 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
