2. Logic Elements and Logic Array Blocks
in the Cyclone III Device Family
December 2011
CIII51002-2.3
CIII51002-2.3
This chapter contains feature definitions for logic elements (LEs) and logic array
blocks (LABs). Details are provided on how LEs work, how LABs contain groups of
LEs, and how LABs interface with the other blocks in the Cyclone
®
III device family
(Cyclone III and Cyclone III LS devices).
Logic Elements
Logic elements (LEs) are the smallest units of logic in the Cyclone III device family
architecture. LEs are compact and provide advanced features with efficient logic
usage. Each LE has the following features:
■
A four-input look-up table (LUT), which can implement any function of four
variables
A programmable register
A carry chain connection
A register chain connection
The ability to drive the following interconnects:
■
■
■
■
■
■
■
■
■
Local
Row
Column
Register chain
Direct link
■
■
Register packing support
Register feedback support
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and
services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.
Cyclone III Device Handbook
Volume 1
December 2011
ALTERA [ ALTERA CORPORATION ]
