Active Serial Configuration (Serial Configuration Devices)
configuration device. The configuration device then provides data on its
serial data output (DATA) pin, which connects to the DATA0input of the
Cyclone II device.
After the Cyclone II device receives all the configuration bits, it releases
the open-drain CONF_DONEpin, which is then pulled high by an external
10-kΩresistor. Also, the Cyclone II device stops driving the DCLKsignal.
Initialization begins only after the CONF_DONEsignal reaches a logic high
level. The CONF_DONEpin must have an external 10-kΩpull-up resistor
in order for the device to initialize. All AS configuration pins (DATA0,
DCLK, nCSO, and ASDO) have weak internal pull-up resistors which are
always active. After configuration, these pins are set as input tri-stated
and are pulled high by the internal weak pull-up resistors.
Initialization Stage
In Cyclone II devices, the initialization clock source is either the
Cyclone II 10-MHz (typical) internal oscillator (separate from the AS
internal oscillator) or the optional CLKUSRpin. The internal oscillator is
the default clock source for initialization. If the internal oscillator is used,
the Cyclone II device provides itself with enough clock cycles for proper
initialization. The advantage of using the internal oscillator is you do not
need to send additional clock cycles from an external source to the
CLKUSRpin during the initialization stage. Additionally, you can use the
CLKUSRpin as a user I/O pin.
If you want to delay the initialization of the device, you can use the
CLKUSRpin option. Using the CLKUSRpin allows you to control when
your device enters user mode. The device can be delayed from entering
user mode for an indefinite amount of time. When you enable the User
Supplied Start-Up Clock option, the CLKUSRpin is the initialization
clock source. Supplying a clock on CLKUSRdoes not affect the
configuration process. After all configuration data has been accepted and
CONF_DONEgoes high, Cyclone II devices require 299 clock cycles to
initialize properly and support a CLKUSRfMAX of 100 MHz.
13–10
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2007
ALTERA [ ALTERA CORPORATION ]
