Selectable I/O Standards in Cyclone II Devices
I/O Driver Impedance Matching (RS) and Series Termination (RS)
Cyclone II devices support driver impedance matching to the impedance
of the transmission line, typically 25 or 50 Ω. When used with the output
drivers, on-chip termination (OCT) sets the output driver impedance to
25 or 50 Ωby choosing the driver strength. Once matching impedance is
selected, driver current can not be changed. Table 10–7 provides a list of
output standards that support impedance matching. All I/O banks and
I/O pins support impedance matching and series termination. Dedicated
configuration pins and JTAG pins do not support impedance matching or
series termination.
Table 10–7. Selectable I/O Drivers with Impedance Matching and Series
Termination
Target RS (Ω)
I/O Standard
3.3-V LVTTL/CMOS
25 (1)
50 (1)
50 (1)
50 (1)
50 (1)
2.5-V LVTTL/CMOS
1.8-V LVTTL/CMOS
SSTL-2 class I
SSTL-18 class I
Note to Table 10–7:
(1) These RS values are nominal values. Actual impedance varies across process,
voltage, and temperature conditions. Tolerance is specified in the DC
Characteristics and Timing Specifications chapter in volume 1 of the Cyclone II
Handbook.
This section provides pad placement guidelines for the programmable
I/O standards supported by Cyclone II devices and includes essential
information for designing systems using the devices’ selectable I/O
capabilities. This section also discusses the DC limitations and guidelines.
Pad Placement
and DC
Guidelines
Quartus II software provides user controlled restriction relaxation
options for some placement constraints. When a default restriction is
relaxed by a user, the Quartus II fitter generates warnings.
f
For more information about how Quartus II software checks I/O
restrictions, refer to the I/O Management chapter in volume 2 of the
Quartus II Handbook.
Altera Corporation
February 2008
10–27
Cyclone II Device Handbook, Volume 1