DC Characteristics and Timing Specifications
Table 5–56. Maximum DCD for SDR Output on Column I/O Notes (1), (2)
(Part 2 of 2)
Column I/O Output Standard
C6
C7
C8
Unit
2.5-V
140
115
745
60
140
115
745
60
155
165
770
75
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
1.8-V
1.5-V
SSTL-2 Class I
SSTL-2 Class II
60
60
80
SSTL-18 Class I
60
130
135
115
75
130
135
115
100
150
155
75
SSTL-18 Class II
60
HSTL-18 Class I
60
HSTL-18 Class II
HSTL-15 Class I
75
150
135
60
150
135
60
HSTL-15 Class II
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
Differential SSTL-18 Class II
Differential HSTL-18 Class I
Differential HSTL-18 Class II
Differential HSTL-15 Class I
Differential HSTL-15 Class II
LVDS
60
60
80
60
130
135
115
75
130
135
115
100
150
155
60
60
60
75
150
135
60
150
135
60
Simple RSDS
60
70
70
Mini-LVDS
60
60
60
Notes to Table 5–56:
(1) The DCD specification is characterized using the maximum drive strength
available for each I/O standard.
(2) Numbers are applicable for commercial, industrial, and automotive devices.
Table 5–57. Maximum for DDIO Output on Row Pins with PLL in the Clock
Path Notes (1), (2) (Part 1 of 2)
Row Pins with PLL in the Clock Path
C6
C7
C8
Unit
LVCMOS
LVTTL
2.5-V
270
285
180
165
310
305
180
175
310
335
220
205
ps
ps
ps
ps
1.8-V
Altera Corporation
February 2008
5–71
Cyclone II Device Handbook, Volume 1