DC Characteristics and Timing Specifications
I/O Delays
Refer to Tables 5–39 through 5–43 for I/O delays.
Table 5–39. I/O Delay Parameters
Symbol
Parameter
tDIP
Delay from I/O datain to output pad
tOP
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
tPCOUT
tPI
Table 5–40. Cyclone II I/O Input Delay for Column Pins (Part 1 of 3)
Fast Corner
–7
–7
–6
Speed
Grade
–8
Speed Speed
Grade Grade
(1)
I/O Standard
Parameter
Speed Unit
Grade
Industrial/ Commer
Automotive
-cial
(2)
LVTTL
2.5V
tPI
581
367
624
410
725
511
790
576
581
367
533
319
533
319
577
363
577
363
609
385
654
430
760
536
828
604
609
385
558
334
558
334
605
381
605
381
1222 1228 1282 1282
760 783 854 854
1192 1238 1283 1283
730 793 855 855
1372 1428 1484 1484
910 983 1056 1056
1439 1497 1556 1556
977 1052 1128 1128
1222 1228 1282 1282
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
1.8V
1.5V
LVCMOS
760
990
528
990
528
783
1015 1040 1040
570 612 612
1015 1040 1040
570 612 612
854
854
SSTL_2_CLASS_I
SSTL_2_CLASS_II
SSTL_18_CLASS_I
SSTL_18_CLASS_II
1027 1035 1045 1045
565 590 617 617
1027 1035 1045 1045
565 590 617 617
tPCOUT
Altera Corporation
February 2008
5–33
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
