I/O Structure & Features
Advanced I/O Standard Support
Table 2–17 shows the I/O standards supported by Cyclone II devices and
which I/O pins support them.
Table 2–17. Cyclone II Supported I/O Standards & Constraints (Part 1 of 2)
Top & Bottom
V
CCIO Level
Side I/O Pins
I/O Pins
I/O Standard
Type
CLK, UserI/O CLK,
User I/O
Pins
Input Output
PLL_OUT
DQS
Pins
DQS
3.3-V LVTTL and LVCMOS
(1)
Single ended
Single ended
Single ended
Single ended
3.3 V/ 3.3 V
2.5 V
v
v
v
v
v
v
v
v
v
v
2.5-V LVTTL and LVCMOS
1.8-V LVTTL and LVCMOS
1.5-V LVCMOS
3.3 V/ 2.5 V
2.5 V
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
1.8 V/ 1.8 V
1.5 V
1.8 V/ 1.5 V
1.5 V
SSTL-2 class I
Voltage
referenced
2.5 V 2.5 V
2.5 V 2.5 V
1.8 V 1.8 V
1.8 V 1.8 V
1.8 V 1.8 V
1.8 V 1.8 V
1.5 V 1.5 V
1.5 V 1.5 V
3.3 V 3.3 V
SSTL-2 class II
Voltage
referenced
SSTL-18 class I
Voltage
referenced
v
(2)
v
(2)
v
(2)
SSTL-18 class II
HSTL-18 class I
Voltage
referenced
Voltage
referenced
v
(2)
v
(2)
v
(2)
HSTL-18 class II
HSTL-15 class I
Voltage
referenced
Voltage
referenced
v
(2)
v
(2)
v
(2)
HSTL-15 class II
PCI and PCI-X (1) (3)
Voltage
referenced
Single ended
v
v
v
v
Differential SSTL-2 class I or Pseudo
class II
(5)
2.5 V
differential (4)
2.5 V
(5)
v
v
(6)
(6)
Differential SSTL-18 class I Pseudo
(5)
1.8 V
v (7)
or class II
differential (4)
1.8 V
(5)
v
v
(6)
(6)
2–52
Altera Corporation
February 2007
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
