Cyclone II Architecture
C16 column interconnects span a length of 16 LABs and provide the
fastest resource for long column connections between LABs, M4K
memory blocks, embedded multipliers, and IOEs. C16 column
interconnects drive to other row and column interconnects at every
fourth LAB. C16 column interconnects drive LAB local interconnects via
C4 and R4 interconnects and do not drive LAB local interconnects
directly. C16 interconnects can drive R24, R4, C16, and C4 interconnects.
Device Routing
All embedded blocks communicate with the logic array similar to
LAB-to-LAB interfaces. Each block (for example, M4K memory,
embedded multiplier, or PLL) connects to row and column interconnects
and has local interconnect regions driven by row and column
interconnects. These blocks also have direct link interconnects for fast
connections to and from a neighboring LAB.
Table 2–1 shows the Cyclone II device’s routing scheme.
Table 2–1. Cyclone II Device Routing Scheme (Part 1 of 2)
Destination
Source
Register
Chain
v
v
Local
Interconnect
v
v
v
v
v
Direct Link
Interconnect
v
v
R4
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Interconnect
R24
Interconnect
C4
v
Interconnect
C16
Interconnect
Altera Corporation
February 2007
2–15
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
