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EP2C35F484I8N 参数 Datasheet PDF下载

EP2C35F484I8N图片预览
型号: EP2C35F484I8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Active Serial Configuration (Serial Configuration Devices)  
During initialization, the initialization clock source is either the  
Cyclone II 10 MHz (typical) internal oscillator (separate from the AS  
internal oscillator) or the optional CLKUSRpin. By default, the internal  
oscillator is the clock source for initialization. If the internal oscillator is  
used, the Cyclone II device provides itself with enough clock cycles for  
proper initialization. The advantage of using the internal oscillator is you  
do not need to send additional clock cycles from an external source to the  
CLKUSRpin during the initialization stage. You can also make use of the  
CLKUSRpin as a user I/O pin, which means you have an additional user  
I/O pin.  
If you want to delay the initialization of the devices in the chain, you can  
use the CLKUSRpin option. The CLKUSRpin allows you to control when  
your device enters user mode. This feature also allows you to control the  
order of when each device enters user mode by feeding a separate clock  
to each device’s CLKUSRpin. By using the CLKUSRpins, you can choose  
any device in the multiple device chain to enter user mode first and have  
the other devices enter user mode at a later time.  
Different device families may require a different number of initialization  
clock cycles. Therefore, if your multiple device chain consists of devices  
from different families, the devices may enter user mode at a slightly  
different time due to the different number of initialization clock cycles  
required. However, if the number of initialization clock cycles is similar  
across different device families or if the devices are from the same family,  
then the devices enter user mode at the same time. See the respective  
device family handbook for more information about the number of  
initialization clock cycles required.  
If an error occurs at any point during configuration, the FPGA with the  
error drives the nSTATUSsignal low. If you enable the Auto-restart  
configuration after error option, the entire chain begins reconfiguration  
after a reset time-out period (a maximum of 40 µs). If the Auto-restart  
configuration after error option is turned off, a microprocessor or  
controller must monitor nSTATUSfor errors and then pulse nCONFIGlow  
to restart configuration. The microprocessor or controller can pulse  
nCONFIGif it is under system control rather than tied to VCC  
.
1
1
While you can cascade Cyclone II devices, serial configuration  
devices cannot be cascaded or chained together.  
If you use the optional CLKUSRpin and the nCONFIGis pulled  
low to restart configuration during device initialization, make  
sure the CLKUSRpin continues to toggle while nSTATUSis low  
(a maximum of 40 µs).  
13–14  
Cyclone II Device Handbook, Volume 1  
Altera Corporation  
February 2007  
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