Introduction to the Stratix GX Device Data Sheet
Figure 1–2. Stratix GX Block Diagram
M4K RAM Blocks
for True Dual-Port
M512 RAM Blocks for
Dual-Port Memory, Shift
Registers, & FIFO Buffers
DSP Blocks for
IOEs Support DDR, PCI, GTL+, SSTL-3,
Multiplication and Full
Memory & Other Embedded SSTL-2, HSTL, LVDS, LVPECL, PCML,
Implementation of FIR Filters
Memory Functions
HyperTransport & other I/O Standards
IOEs
LABs
IOEs
LABs
IOEs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
M-RAM Block
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
IOEs
IOEs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
LABs
DSP
Block
The number of M512 RAM, M4K RAM, and DSP blocks varies by device
along with row and column numbers and M-RAM blocks. Table 1–5 lists
the resources available in Stratix GX devices.
Table 1–5. Stratix GX Device Resources
M512 RAM
Columns/Blocks Columns/Blocks
M4K RAM
M-RAM
Blocks
DSP Block
Columns/Blocks Columns
LAB
Device
LAB Rows
EP1SGX10
EP1SGX25
EP1SGX40
4 / 94
6 / 224
8 / 384
2 / 60
3 / 138
3 / 183
1
2
4
2 / 6
2 / 10
2 / 14
40
62
77
30
46
61
Altera Corporation
February 2005
1–7
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
