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EP1SGX40GF1020I6N 参数 Datasheet PDF下载

EP1SGX40GF1020I6N图片预览
型号: EP1SGX40GF1020I6N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 4697 CLBs, 41250-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, LEAD FREE, FBGA-1020]
分类和应用: 可编程逻辑
文件页数/大小: 279 页 / 3682 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Figure 2–16. Word Aligner in 16-Bit Mode  
Word Aligner  
Manual  
Alignment  
Mode  
Pattern Detector  
16-Bit  
Mode  
16-Bit  
Mode  
A1A2  
Mode  
A1A1A2A2  
Mode  
A1A2  
Mode  
A1A1A2A2  
Mode  
In the 16-bit mode, the word aligner and pattern detector automatically  
aligns and detects a user-defined 16-bit alignment pattern. This pattern  
can be in the format of A1A2 or A1A1A2A2 (for the SONET protocol). The  
re-alignment of the byte boundary can be done via a user-controlled port.  
The 16-bit mode supports only the 8-bit data path in a single-width or  
double-width mode.  
The 16-bit mode is available only for the basic mode and SONET mode.  
The A1A1A2A2 word alignment pattern option is available only for the  
SONET mode and cannot be used in the basic mode.  
Figure 2–17 shows the word aligner in 10-bit mode.  
2–20  
Stratix GX Device Handbook, Volume 1  
Altera Corporation  
February 2005  
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