Stratix Architecture
Figure 2–70. Stratix I/O Banks Notes (1), (2), (3)
DQS9T DQS8T DQS7T DQS6T DQS5T
DQS4T DQS3T DQS2T DQS1T DQS0T
PLL5
10
PLL7 VREF1B3 VREF2B3 VREF3B3 VREF4B3 VREF5B3
Bank 3
PLL11
VREF1B4 VREF2B4 VREF3B4 VREF4B4 VREF5B4 PLL10
Bank 4
9
LVDS, LVPECL, 3.3-V PCML,
and HyperTransport I/O Block
and Regular I/O Pins (4)
LVDS, LVPECL, 3.3-V PCML,
and HyperTransport I/O Block
and Regular I/O Pins (4)
(5)
(5)
I/O Banks 3, 4, 9 & 10 Support
All Single-Ended I/O Standards
I/O Banks 1, 2, 5, and 6 Support All
Single-Ended I/O Standards Except
Differential HSTL Output Clocks,
Differential SSTL-2 Output Clocks,
HSTL Class II, GTL, SSTL-18 Class II,
PCI, PCI-X 1.0, and AGP 1×/2×
PLL1
PLL2
PLL4
PLL3
I/O Banks 7, 8, 11 & 12 Support
All Single-Ended I/O Standards
(5)
(5)
LVDS, LVPECL, 3.3-V PCML,
and HyperTransport I/O Block
and Regular I/O Pins (4)
LVDS, LVPECL, 3.3-V PCML,
and HyperTransport I/O Block
and Regular I/O Pins (4)
Bank 8
11
12
Bank 7
VREF5B8 VREF4B8 VREF3B8 VREF2B8 VREF1B8
DQS9B DQS8B DQS7B DQS6B DQS5B
PLL12
VREF5B7 VREF4B7 VREF3B7 VREF2B7 VREF1B7
DQS4B DQS3B DQS2B DQS1B DQS0B
PLL8
PLL9
PLL6
Notes to Figure 2–70:
(1) Figure 2–70 is a top view of the silicon die. This will correspond to a top-down view for non-flip-chip packages, but
will be a reverse view for flip-chip packages.
(2) Figure 2–70 is a graphic representation only. See the device pin-outs on the web (www.altera.com) and the
Quartus II software for exact locations.
(3) Banks 9 through 12 are enhanced PLL external clock output banks.
(4) If the high-speed differential I/O pins are not used for high-speed differential signaling, they can support all of the
I/O standards except HSTL Class I and II, GTL, SSTL-18 Class II, PCI, PCI-X 1.0, and AGP 1× /2× .
(5) For guidelines for placing single-ended I/O pads next to differential I/O pads, see the Selectable I/O Standards in
Stratix and Stratix GX Devices chapter in the Stratix Device Handbook, Volume 2.
Altera Corporation
July 2005
2–125
Stratix Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
