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EP1S20F672C7N 参数 Datasheet PDF下载

EP1S20F672C7N图片预览
型号: EP1S20F672C7N
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 2132 CLBs, 18460-Cell, CMOS, PBGA672, 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, BGA-672]
分类和应用:
文件页数/大小: 292 页 / 1528 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Stratix Automated Single Event Upset (SEU) Detection  
Local Update Mode  
Local update mode is a simplified version of the remote update. This  
feature is intended for simple systems that need to load a single  
application configuration immediately upon power up without loading  
the factory configuration first. Local update designs have only one  
application configuration to load, so it does not require a factory  
configuration to determine which application configuration to use.  
Figure 3–4 shows the transition diagram for local update mode.  
Figure 3–4. Local Update Transition Diagram  
Power-Up  
or nCONFIG  
nCONFIG  
Application  
Configuration  
Configuration  
Error  
nCONFIG  
Configuration  
Error  
Factory  
Configuration  
Stratix devices offer on-chip circuitry for automated checking of single  
event upset (SEU) detection. FPGA devices that operate at high elevations  
or in close proximity to earth’s North or South Pole require periodic  
checks to ensure continued data integrity. The error detection cyclic  
redundancy check (CRC) feature controlled by the Device & Pin Options  
dialog box in the Quartus II software uses a 32-bit CRC circuit to ensure  
data reliability and is one of the best options for mitigating SEU.  
Stratix  
Automated  
Single Event  
Upset (SEU)  
Detection  
3–12  
Altera Corporation  
Stratix Device Handbook, Volume 1  
July 2005  
 
 
 
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