ACEX 1K Programmable Logic Device Family Data Sheet
Each ACEX 1K device is functionally tested. Complete testing of each
configurable static random access memory (SRAM) bit and all logic
functionality ensures 100% yield. AC test measurements for ACEX 1K
devices are made under conditions equivalent to those shown in
Figure 21. Multiple test patterns can be used to configure devices during
all stages of the production flow.
Generic Testing
Figure 21. ACEX 1K AC Test Conditions
Power supply transients can affect AC
measurements. Simultaneous transitions of
multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC
conditions. Large-amplitude, fast-ground-
current transients normally occur as the
device outputs discharge the load
capacitances. When these transients flow
through the parasitic inductance between
the device ground pin and the test system
ground, significant reductions in
observable noise immunity can result.
Numbers in brackets are for 2.5-V devices
or outputs. Numbers without brackets are
for 3.3-V devices or outputs.
VCCIO
703 Ω
[481
]
]
Ω
To Test
System
Device
Output
Ω
Ω
8.06 k
[481
C1 (includes
JIG capacitance)
13
Device input
rise and fall
times < 3 ns
Tables 18 through 21 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 2.5-V ACEX 1K devices.
Operating
Conditions
Table 18. ACEX 1K Device Absolute Maximum Ratings
Note (1)
Symbol Parameter Conditions
Min
Max
Unit
VCCINT Supply voltage
VCCIO
With respect to ground (2)
–0.5
–0.5
–2.0
–25
–65
–65
3.6
4.6
V
V
VI
DC input voltage
5.75
25
V
IOUT
TSTG
TAMB
TJ
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
mA
° C
° C
° C
No bias
150
135
135
Under bias
PQFP, TQFP, and BGA packages, under
bias
Altera Corporation
45
ALTERA [ ALTERA CORPORATION ]
